1. Field of the Invention
The present invention generally relates to methods and apparatuses for driving liquid crystal display (LCD) panels, more particularly to LCD panel driving techniques employing both time division driving and inversion driving schemes.
2. Description of the Related Art
The time division driving method, which involves time-divisionally writing data signals into pixels through serially selecting data lines (or signal lines), is one of the schemes widely used to drive LCD panels. One advantage of the time division driving method is that the number of output amplifiers to be integrated within an LCD driver is reduced; the time division drive allows driving pixels using a smaller number of output amplifiers than the number of data lines of an LCD panel. The time division driving method is effective to reduce power consumption and the chip size of the LCD driver. Another advantage is that the number of wire lines necessary for providing connections between the LCD driver and the LCD panel is effectively reduced, through adopting an architecture in which data line are selected by switches integrated within the LCD panel. The reduced number of the wire lines between the LCD driver and the LCD panel facilitates the connection between the LCD driver and the LCD panel, and is effective to reduce EMI (electromagnetic interference). Under the circumstances wherein the number of pixels to be provided in LCD panels tends to increase, the increase in the number of data lines to be time divisionally driven is strongly required.
Another scheme widely used to drive an LCD device is an inversion driving scheme. The frame inversion driving involves alternating the polarity of data signals every frame to prevent a “burn-in” of the LCD panel. The frame inversion driving scheme effectively reduces DC (direct current) components of the data signals across the liquid crystal cells, and thereby avoids the “burn-in” of the LCD panel.
The frame inversion driving is schematically classified into the following two drive schemes: the common constant driving scheme and the common inversion driving scheme. The common constant driving scheme involves maintaining the potential of the common electrode of pixels (referred to as the “common potential VCOM”, hereafter) constant while inverting the polarity of the data signals. In contrast, the common inversion driving scheme involves inverting both of the data signals and the common potential. The common constant driving scheme is advantageous in being superior in the stability of the common electrode compared to the common inversion driving scheme. As widely known in the art, the stability in the common potential VCOM is important to avoid the occurrence of the flicker. As described below, the present invention concerns the common constant driving method.
As disclosed in Japanese Patent Gazettes Nos. 3433337 and 3056085, for example, the dot inversion driving is a scheme effective for improving the stability of the common potential VCOM, and thereby reducing the flicker. The dot inversion driving scheme involves writing data signals with opposite polarities into every two adjacent pixels. The adjacent pixels are synchronously written with data signals having the opposite polarities, so that variations in the common potential are effectively suppressed to avoid the occurrence of the flicker.
The time division driving and the dot inversion driving are both advantageous scheme; however, as disclosed in Japanese Open-Laid Patent Application No. H11-327518, the time division driving scheme and the dot inversion driving scheme are not compatible with each other in the case when the number of data lines to be time-divisionally driven by a single amplifier is an even number. In order to avoid the problem, this patent application discloses a technique wherein the number of data lines divisionally driven by a single amplifier is 3n. The following describes the reason why the typical time division driving and dot inversion driving schemes are not compatible with each other in the case that the number of time-divisionally driven data lines is an even number.
FIG. 1 is a view showing an exemplary structure of a typical LCD device 100 that performs time division driving. The LCD device 100 includes an LCD panel 101 and a controller driver 102 that drives the LCD panel 101. The LCD panel 101 is provided with gate lines 111 (scan lines), data lines 112 (signal lines), and pixels 113 arrayed in rows and columns. The pixels 113 each includes a TFT 14 (thin film transistor) and a pixel electrode 115. The pixel electrode 115 opposes a common electrode 116, wherein a liquid crystal cell is formed between the pixel electrode 115 and the common electrode 116. The LCD panel 101 further includes one input terminal 117 for every six data lines 112. The six data lines 112 associated with the same input terminal 117 are collectively referred to as a data line set 118, wherein the six data lines 112 associated with the same data line set 118 are time divisionally driven by one output buffer within the controller driver 102. A set of switches 119 for selecting the data lines 112 are provided between the data lines 112 and the associated input terminals 117.
In this typical LCD device, the switches 119 associated with the same input terminal 117 are sequentially turned on in the order from the one positioned at the end to the one positioned at the other end. This achieves sequentially selecting the data lines 112 associated with the same data line set 118 are sequentially selected in the order from the one positioned at the end to the one positioned at the other end.
According to the dot inversion driving for pixels 113 associated with the same gate line 111, on the other hand, the polarity of the data signals provided for the pixels 113 coupled to the odd-numbered data lines 112 has to be opposite to the polarity of the data signals provided for the pixels 113 coupled to the even-numbered data lines 112.
Consequently, adopting both of the above-mentioned time division driving and dot inversion driving results in that the data signals of the same polarity are supplied to the selected data lines 112. Let us consider the leftmost one of the data lines 112 of the respective data line sets 118, for example, assuming that the data signals of the positive polarity are supplied to the pixels 113 coupled to the odd-numbered data lines 112 and the data signals of the negative polarity are supplied to the pixels 113 coupled to the even-numbered data line 112. As shown in FIG. 2, the typical time division driving scheme involves firstly supplying data signals onto the leftmost one of the data lines 112 within each data line set 118 during the data write operation associated with the selected gate line. The polarities of the data signals supplied to the leftmost data lines 112 are all positive, because the leftmost data lines 112 within the respective data line sets 118 is an odd-numbered data line. This results in that the data signals of the same polarity are supplied to the selected data lines 112. Those skilled in the art would appreciate that this is the case for the other data lines 112.
As shown in FIG. 3, supplying data signals of the same polarity to the selected data lines 112 undesirably develops current flows into the common electrode 116 (or current flows from the common electrode 116), due to the capacitance coupling between the respective data lines 112 and common electrode 116, and this causes undesirable fluctuation of the potential on the common electrode 116. The fluctuation of the potential on the common electrode 116 defeats the technical merit of the dot inversion driving. In other words, the dot inversion driving is not compatible with the time division driving for the configuration having six data lines time being divisionally driven.
Those skilled in the art would appreciate that the same goes for concurrently performing the dot inversion driving and the time division driving which involves time divisionally driving an odd-number of signal lines other than six.
The limitation of the number of data lines to be time-divisionally driven undesirably deteriorates the flexibility of the LCD device design. In particular, the fact that the number of data lines to be time-divisionally driven is restricted to an odd number is not preferable for next generation LCD drivers, which require increase in the number of data lines time to be divisionally driven up to six.
Such problems as described above with an LCD device employing the time division driving scheme would be solved by providing a new technique for suppressing fluctuations in the common potential VCOM. Under these circumstances, there is a need for providing a technique of suppressing fluctuations in the common potential VCOM for the LCD device employing the time division driving scheme.